EDN

Power-aware FPGA design (Part 1)

Power consumption requirements in new autonomous, multimedia-savvy consumer products that can store, transmit, and receive data have catapulted system architects and board and chip designers into a ...
EDN

Introducing the Integrated Circuit (IC) Design Cycle

The process of designing, manufacturing, and testing ICs is complex and exhaustive. The main contributors are the design and verification teams, IP vendors, and IC manufacturers. The process of ...
Design-Reuse

FPGA Soft Processor Design Considerations

With so many available processor design options design teams must make the difficult decision to choose the solution that best fits their specific project requirements, while supporting extended ...
Design-Reuse

LTE Single Carrier DFT: Faster Circuits with Reduced FPGA LUT/Register Usage

Single carrier frequency division multiple access (SC-FDMA) is a part of the LTE protocol used for up-link data transmission. It involves a discrete Fourier transform (DFT) pre-coding of the ...
CU Boulder News & Events

ECEA 5361 Hardware Description Languages for FPGA Design

This course will give you the foundation for using Hardware Description Languages, specifically VHDL and Verilog for Logic Design. You will learn the history of both VHDL and Verilog and how to use ...
Electronic Design

FPGA Prototyping Tool Aligns With ASIC Flow

Over a third of all high-end ASIC designers now use FPGAs for prototyping 500,000-plus-gate designs. Driving this trend is the fact that a median application-specific integrated-circuit (ASIC) design ...
Electronic Design

FPGA Design Issues 201

It doesn't matter if you're the logic designer, hardware engineer, or systems engineer, or if you wear all of those hats. If you use an FPGA in any sort of complex system with high speeds and multiple ...