While still early, these early results for an apparent AMD Medusa Point APU based on Zen 6 are looking mighty strong!

These next-generation laptop processors are also reported to receive a bump across both CPU core counts and L3 cache configurations.

While it's premature to draw any real conclusions (particularly performance), there are some interesting details in the listing.

TL;DR: AMD's Ryzen 9 9950X3D processor, debuting at CES 2025, features 16 cores, 32 threads, and up to 5.65GHz clock speeds. It includes 128MB of L3 cache using 3D V-Cache technology, maintaining a ...

CPUs have a number of caching levels. We've discussed cache structures generally, in our L1 & L2 explainer, but we haven't spent as much time discussing how an L3 works or how it's different compared ...

AMD is officially lowering the barrier to entry for the Ryzen 7000 series today, announcing a handful of new models aimed at more price-conscious buyers. For people on the money-is-no-object end of ...

Last fall ahead of the SC21 supercomputing conference, AMD said it was going to be the first of the major compute engine makers to add 3D vertical L3 cache to its chips, in this case to variants of ...

AMD recently put the Ryzen 7 9800X3D desktop processor on the shelves, claiming it to be the "ultimate solution for the PC gaming market." In the gaming community, the X3D class processors have ...

AMD's 7800X3D and 7950X3D CPUs reign supreme in the gaming realm, not solely due to their core count or clock speeds, but primarily owing to their abundant cache. CPU cache refers to a small yet ...

Let me first say that I'm not (nor will I ever be) an electrical engineer. I'm just curious.<BR><BR>Basically, a friend and I were talking about possible future Nehalem processors. We were ...

A new rumor suggests that a next-gen Intel CPU with technology to rival AMD's gaming processors is on the way. The details about future Nova Lake gaming CPUs, while very much unconfirmed so far, ...

In the eighties, computer processors became faster and faster, while memory access times stagnated and hindered additional performance increases. Something had to be done to speed up memory access and ...