Moore’s law, applied to data rates, has pushed PCB circuits so fast that the layout becomes part of the circuit. In designs such as DDR3 and PCIe, the fastest memory and high-speed serial performance ...

本文主要介绍在进行防护电路设计时，需要特别留意的防护元件位置及PCB Layout走线方式等事项，适用于目前市面上各式不同封装的防护元件。 1. ESD/EOS保护元件配置位置的注意事项 图一 :拆解保护元件在PCB Layout时配置位置的各项参数 如图一L1 - 指PCB Layout 时 ...

In this product-how to, ANSYS’ Steve Pytel explains how to use the ANSYS SIwave-DC simulation tool to predict DC power loss and voltage drop for a PCB. As supply voltages continue to decrease and ...

This week Mentor Graphics released its Xpedition™ platform, which squarely takes aim at simplifying board layout and place and route. Long gone are the days when each component could be considered a ...

This file type includes high resolution graphics and schematics when applicable. In the development of SoC-based (system-on-chip) circuit boards, the SoC’s additional capabilities will provide ...

When current flows through a conductor it becomes an inductor, when there is an inductor there is an electromagnetic field (EM). This can cause a variety of issues during PCB layout if you don’t plan ...

6. SOT-23 and SOIC packages are typically used in low-power motor drivers. Standard leaded packages, like SOIC and SOT-23 packages, are often used for low-power motor drivers (Fig. 6). To maximize the ...

I was looking over the week’s posts on Hackaday – it’s part of my job after all – and this gem caught my eye: a post about how to make your own RP2040 development board from scratch. And I’ll admit ...