The traditional approach to moving scan test data from chip-level pins to core-level scan channels is under pressure due to the dramatic rise in design size, design complexity, and test adaptation. To ...

At Alcatel-Lucent, we test chassis-level products that provide 42 board slots on a midplane, essentially a passive backplane that accepts boards on its front and rear sides. Thirty-four of those slots ...

Still using the same old test tools? New boundary scan software can improve your efficiency. Boundary scan PCB testing has been made easier by the new ProVision software application from JTAG ...

For more than four decades, scan technology has somehow eluded the radar screen of the IC test industry. As test continues to evolve and make significant newsworthy changes, scan has maintained a ...

Some new design-for-test (DFT) technologies are difficult, expensive, or risky to implement but offer significant benefits. Other technologies are easy to implement but offer minor improvements. The ...

In the mid 80s, a group of industry pioneers, the Joint Test Action Group (JTAG), started meetings in a hotel near the Amsterdam airport, invited by Philips, to put down the first stone of one of the ...