Lab architecture used to test 2D semiconductors artificially boosts performance metrics, making it harder to assess whether these materials can truly replace silicon.

Duke engineers show how a common device architecture used to test 2D transistors overstates their performance prospects in real-world devices.

The research 'Impact of Contact Gating on Scaling of Monolayer 2D Transistors Using a Symmetric Dual-Gate Structure' appeared ...

Artificial intelligence (AI) has become the workload that defines today’s semiconductor scaling. Whether in hyperscale data centers training foundation models or at the network edge executing ...